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Analog/RF/mmW IC Design Engineer

Release Date:2022-04-18

Job Scription

ASR Microelectronics is expanding the Design Centre in Pavia, Italy. To facilitate this growth, we are searching for different types of engineers.

In particular, we are looking for suitable candidates to fill the role of Senior Analog/RF/mmW Design Engineer. The successful candidate will report to the Manager in Italy and will work in a close relationship with the local team but he will also interact with teams in US and China.


The successful candidate will have knowledge and experience of:

·??????? Master’s Degree or above in Electrical/Electronic Engineering or relevant disciplines.

·??????? 3+ years’ working experience in analog and mixed-signal IC design field.

·??????? Solid knowledge in Integrated Circuit design and optimization and experience of silicon proven and verified circuits.

·??????? Knowledge of RF/mmW circuits for wireless applications (LNAs, PAs, Mixers, PLLs)

·??????? Knowledge of high speed/high resolution data converters is a plus

Being a creative team player and having capability to integrate with the actual group is a plus.

Fluent English is also a requirement as well as having any necessary work permits that allow the successful candidate to work in Italy.


Job Qualifications

·??????? A minimum Degree level qualification in Electronic Engineering or related discipline is essential.

· 3+ years’ working experience in analog IC Layout field.

· Skills:AnalogLayout / Cadence Virtuoso / Parasitic Extraction Tools


Send your resume to email: ugo.decani[email protected]

Analog IC Layout Engineer

Release Date:2022-04-18

Job Scription

ASR Microelectronics is expanding the Design Centre in Pavia, Italy. To facilitate this growth, we are searching for different types of engineers.

In particular, we are looking for suitable candidates to fill the role of Senior Analog/RF/mmW Design Engineer. The successful candidate will report to the Manager in Italy and will work in a close relationship with the local team but he will also interact with teams in US and China.


The successful candidate will have knowledge and experience of:

· Physical design on numerous CMOS technologies.

· Multiple EDA design environments or display the ability to adapt to new design flows,?processes, and EDA tools.

· A minimum Degree level qualification in Electronic Engineering or related discipline is essential.


Being a creative team player and having capability to integrate with the actual group is a plus.

Fluent English is also a requirement as well as having any necessary work permits that allow the successful candidate to work in Italy.


Job Qualifications

· A minimum Degree level qualification in Electronic Engineering or related discipline is?essential.

· 3+ years’ working experience in analog IC Layout field.

· Skills:AnalogLayout / Cadence Virtuoso / Parasitic Extraction Tools



Send your resume to email: [email protected]

021-60336588

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